| 发明名称 | Apparatus related to capacitance reduction of a signal port | ||
| 摘要 | In one general aspect, an apparatus includes a first capacitor defined by a dielectric disposed between a bump metal and a region of a first conductivity type, and a second capacitor in series with the first capacitor and defined by a PN junction including the region of the first conductivity type and a region of a second conductivity type. The region of the first conductivity type can be configured to be coupled to a first node having a first voltage, and the region of the second conductivity type can be configured to be coupled to a second node having a second voltage different than the first voltage. | ||
| 申请公布号 | US8928142(B2) | 申请公布日期 | 2015.01.06 |
| 申请号 | US201313774135 | 申请日期 | 2013.02.22 |
| 申请人 | Fairchild Semiconductor Corporation | 发明人 | Snowdon Kenneth P. |
| 分类号 | H01L23/488;H01L27/10;H01L23/498;H01L23/00 | 主分类号 | H01L23/488 |
| 代理机构 | Brake Hughes Bellermann LLP | 代理人 | Brake Hughes Bellermann LLP |
| 主权项 | 1. An apparatus, comprising: a first capacitor defined by a dielectric disposed between a bump metal and a region of a first conductivity type; and a second capacitor in series with the first capacitor and defined by a PN junction including the region of the first conductivity type and a region of a second conductivity type, the region of the first conductivity type configured to be coupled to a first node having a first voltage, the region of the second conductivity type configured to be coupled to a second node having a second voltage different than the first voltage. | ||
| 地址 | San Jose CA US | ||