| 发明名称 | Circuit and method for flicker suppression in light emitting diodes (LEDs) | ||
| 摘要 | A circuit for flicker suppression in a Light Emitting Diode (LED) has a latch. The latch has a first state set with a trailing edge of Pulse Width Modulated Dimming (PWMD) pulse, and a second state set delayed with respect to the PWMD trailing edge. A trigger circuit is coupled to the latch. The trigger circuit sends a signal to the latch to change to the second state when a decision point occurs during a time following a duty limit Dmax of a gate of a LED driver circuit. | ||
| 申请公布号 | US8907580(B2) | 申请公布日期 | 2014.12.09 |
| 申请号 | US201313757780 | 申请日期 | 2013.02.02 |
| 申请人 | Supertex, Inc. | 发明人 | Mednik Alexander |
| 分类号 | H05B33/08 | 主分类号 | H05B33/08 |
| 代理机构 | Weiss & Moy, P.C. | 代理人 | Weiss & Moy, P.C. ;Moy Jeffrey D. |
| 主权项 | 1. A circuit for flicker suppression in a Light Emitting Diode (LED) comprising: a latch, the latch having a first state set with a trailing edge of Pulse Width Modulated Dimming (PWMD) pulse, and a second state set delayed with respect to the PWMD trailing edge; and a trigger circuit coupled to the latch, the trigger circuit sending a signal to the latch to change to the second state when a decision point occurs during a time following a duty limit Dmax of a gate of a LED driver circuit, wherein the trigger circuit comprises: a plurality of logic gates, wherein the plurality of logic gates provides the signal to the latch to change to the second state when a decision point occurs during a time following a duty limit Dmax of a gate of a LED driver circuit; and a delay circuit coupled to at last one of the plurality of logic gates. | ||
| 地址 | Sunnyvale CA US | ||