发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 According to one embodiment, the semiconductor memory device includes a first memory cell, first, second, third and fourth interconnect lines and first, second and third write circuits. The first memory cell includes a first magnetic tunnel junction (MTJ) element. The first interconnect line is connected to one end of the first memory cell. The first write circuit drives the first interconnect line. The second interconnect line is connected to the other end of the first memory cell. The second write circuit drives the second interconnect line. The third and fourth interconnect lines are adjacent to the first memory cell. The third write circuit drives the third and fourth interconnect lines.
申请公布号 US2014355336(A1) 申请公布日期 2014.12.04
申请号 US201314018318 申请日期 2013.09.04
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HOYA Katsuhiko
分类号 G11C11/16 主分类号 G11C11/16
代理机构 代理人
主权项 1. A semiconductor memory device comprising: a first memory cell including a first magnetic tunnel junction (MTJ) element; a first interconnect line connected to one end of the first memory cell; a first write circuit which drives the first interconnect line; a second interconnect line connected to the other end of the first memory cell; a second write circuit which drives the second interconnect line; third and fourth interconnect lines adjacent to the first memory cell; and a third write circuit which drives the third and fourth interconnect lines.
地址 Tokyo JP