| 摘要 |
An approach for providing SRAM bit cells with double patterned metal layer structures is disclosed. Embodiments include: providing, via a first patterning process, a word line structure, a ground line structure, a power line structure, or a combination thereof; and providing, via a second patterning process, a bit line structure proximate the word line structure, the ground line structure, the power line structure, or a combination thereof Embodiments include: providing a first landing pad as the word line structure, and a second landing pad as the ground line structure; and providing the first landing pad to have a first tip edge and a first side edge, and the second landing pad to have a second tip edge and a second side edge, wherein the first side edge faces the second side edge. |
| 主权项 |
1. A device comprising:
at least one word line structure having a first tip edge and a first side edge; at least one ground line structure having a second tip edge and a second side edge; at least one power line structure; and at least one bit line structure proximate the at least one word line structure, the at least one ground line structure, and the at least one power line structure, the at least one word line structure, at least one ground line structure, and the at least one power line structure, and the at least one bit line structure together providing at least one double patterned metal layer structure, wherein the at least one double patterned metal layer structure is connected to active region contacts and gate contacts. |
