发明名称 マルチレベルメモリ素子およびこれをプログラムし読出す方法
摘要 A multilevel memory core includes a word line and a bit line. The multilevel memory core also includes a core cell in electrical communication with the word line and the bit line. The core cell includes a threshold changing material. The threshold changing material is programmed to define multiple levels for storage where each of the multiple levels for storage is associated with a corresponding threshold voltage. Methods for reading the multilevel memory core also are described.
申请公布号 JP5611499(B2) 申请公布日期 2014.10.22
申请号 JP20040138733 申请日期 2004.05.07
申请人 发明人
分类号 G11C13/00;H01L27/105;G11C11/56;G11C16/02;G11C16/26;H01L27/10;H01L45/00 主分类号 G11C13/00
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