APPARATUS AND CIRCUIT FOR PROCESSING CARRIER AGGREGATION

摘要

The present invention regarding a circuit for processing carrier aggregation (CA) includes a plurality of component carrier (CC) processing units for estimating a frequency offset with respect to a corresponding CC and compensating the estimated frequency offset; a reference clock generator for generating a reference clock using a reference frequency offset among frequency offsets outputted from each of the CC processing units; a plurality of reception phase lock loop (PLL) units for generating a reception carrier frequency for the corresponding CC to correspond to the reference clock; and a plurality of transmission PLL units for generating a transmission carrier frequency for the corresponding CC to correspond to the reference clock.