TEST APPARATUS AND TEST SYSTEM

摘要

A test apparatus of the present embodiment has a logic cell, a host and a first bus. The host includes: a conversion section configured to analyze a test vector and convert the test vector to signal control data and a waveform shape; and a judgment section configured to analyze an expected value comparison result to perform success/failure judgment of a test of a semiconductor circuit. The logic cell is provided with a first storage section configured to store the signal control data, a second storage section configured to store the waveform shape as a waveform shape table, a waveform generating section configured to generate an output waveform for controlling the semiconductor circuit and output the output waveform, and an expected value comparing section configured to obtain the expected value comparison result on the basis of the signal control data and the waveform shape table.

主权项

1. A test apparatus comprising:
a logic cell provided with input/output terminals which are one-to-one connected to input/output terminals of a semiconductor circuit; a host comprising a conversion section configured to analyze a test vector for performing a test of the semiconductor circuit and convert the test vector to signal control data and a waveform shape, and a judgment section configured to, by controlling the semiconductor circuit with the signal control data, analyze an expected value comparison result obtained from the logic cell to perform success/failure judgment of the test of the semiconductor circuit; and a first bus for data transfer connecting the logic cell and the host; wherein the logic cell comprises a first storage section configured to store the signal control data transmitted via the first bus, a second storage section configured to store the waveform shape transmitted via the first bus as a waveform shape table, a waveform generating section configured to generate an output waveform for controlling the semiconductor circuit on the basis of the signal control data and the waveform shape table and output the output waveform to the semiconductor circuit, and an expected value comparing section configured to generate an expected value on the basis of the signal control data and the waveform shape table and obtain the expected value comparison result in which a signal value inputted from the semiconductor circuit is compared with the expected value.