Method of manufacturing a printed wiring board

摘要

A method for manufacturing a printed wiring board including providing a structure having a wiring substrate having a conductor circuit, a build-up multilayer structure formed over the wiring substrate and having an outermost conductor circuit and an outermost insulative resin layer, and a solder resist layer formed over the outermost conductor circuit and outermost insulative resin layer and having openings with an opening diameter D for mounting electronic elements, forming conductor pads with a pitch of about 200 pm or less on the outermost conductor circuit in the openings of the solder resist layer, respectively, and forming solder bumps with a height H from a surface of the solder resist layer on the conductor pads on the conductor pads, respectively, such that a ratio H/D is about 0.55 to about 1.0.

主权项

1. A method for manufacturing a printed wiring board, comprising:
providing a structure comprising a wiring substrate, a build-up multilayer structure formed over the wiring substrate and a solder resist layer formed over the build-up multilayer structure; forming in the solder resist layer a plurality of openings such that a plurality of conductor pads positioned to mount an electronic element is formed in the plurality of openings of the solder resist layer, respectively; and forming a plurality of solder bumps on the conductor pads on the plurality of conductor pads, respectively, such that each of the solder bumps has a height H in μm from an outer surface of the solder resist layer prior to mounting the electronic element, wherein the build-up multilayer structure includes an outermost conductor circuit, the plurality of openings is formed such that each of the openings has an opening diameter D in μm and exposes a portion of the outermost conductor circuit to form each of the conductor pads and that the plurality of conductor pads is formed at a pitch of about 200 μm or less between adjacent conductor pads, and the plurality of solder bumps is formed in the plurality of openings, respectively, such that each of the solder bumps has a ratio H/D of about 0.55 to about 1.0.