Compact routing

摘要

Techniques for compacting routing in lower level blocks to free routing resources for upper level blocks are disclosed. In some embodiments, a specification of a hierarchical integrated circuit design comprising a lower level block and an upper level block is obtained. The specification includes an initial routing plan for the lower level block. Subsequently, a compacted routing plan for the lower level block using constrained routing resources comprising fewer routing tracks than the initial routing plan and resulting in at least one unused track as well as a routing plan for the upper level block using the at least one unused track are generated.

主权项

1. A system configured to:
obtain a specification of a hierarchical integrated circuit design comprising a lower level block and an upper level block when the system is invoked to route the hierarchical integrated circuit design, wherein the specification comprises a first routing plan associated with the lower level block; modify the first routing plan using constrained routing resources so as to generate a second routing plan associated with the lower level block, the second routing plan comprising fewer routing tracks than the first routing plan and resulting in at least one unused track; and generate a third routing plan associated with the upper level block using the at least one unused track.