Low leakage spare gates for integrated circuits

摘要

Devices, systems, methods, and other embodiments associated with spare gates are described. In one embodiment, a spare gate in an integrated circuit has a disconnected discharge path to minimize or eliminate current leakage.

主权项

1. A spare gate cell, comprising:
a voltage source connection; a ground connection; a plurality of transistors interconnected between the voltage source connection and the ground connection, wherein the plurality of transistors are low voltage threshold (LVT) transistors that have greater current leakage than standard voltage threshold (SVT) transistors, and wherein the LVT transistors are implemented for timing critical paths in an integrated circuit; and wherein a plurality of drains from the plurality of low voltage threshold (LVT) transistors are unconnected wherein a discharge path from the voltage source connection to the ground connection is disconnected; wherein the spare gate cell is formed on an integrated circuit chip that includes a pre-defined logic circuit formed on the integrated circuit chip, and wherein the plurality of low voltage threshold (LVT) transistors being configured to modify functionality of the pre-defined logic circuit.