发明名称 |
INTER-INTEGRATED CIRCUIT-SLAVE INTERFACE, AND METHOD FOR OPERATING AN INTER-INTEGRATED CIRCUIT-SLAVE INTERFACE |
摘要 |
An I2C interface is provided which has a data line and a clock line, the clock line having a first input buffer, and the data line having a second input buffer and an output buffer, the data line being provided for the transmission of a data input signal and a data output signal, the clock line being provided for the transmission of a clock signal, the clock line having a first delay element, and the data line having a second delay element and a third delay element. A method for operating an I2C slave interface is also provided. |
申请公布号 |
US2014153681(A1) |
申请公布日期 |
2014.06.05 |
申请号 |
US201314096756 |
申请日期 |
2013.12.04 |
申请人 |
CVEJANOVIC Dorde |
发明人 |
CVEJANOVIC Dorde |
分类号 |
H04L7/00 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
1. An inter-integrated circuit slave interface, comprising:
a data line; and a clock line, the clock line having a first input buffer and the data line having a second input buffer and an output buffer, the data line for transmission of a data input signal and a data output signal, and the clock line for the transmission of a clock signal, wherein the clock line has a first delay element, and the data line has a second delay element and a third delay element, the first delay element being configured to delay an ascending flank of the clock signal by a first time and a descending flank of the clock signal by a second time, the second delay element being configured to delay an ascending flank of the data input signal by a third time and a descending flank of the data input signal by a fourth time, and the third delay element being configured to delay an ascending flank of the data output signal by a fifth time and a descending flank of the data output signal by a sixth time.
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地址 |
Muenchen DE |