发明名称 METHOD AND SYSTEM FOR GALLIUM NITRIDE VERTICAL JFET WITH SEPARATED GATE AND SOURCE
摘要 A semiconductor structure includes a III-nitride substrate and a first III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate. The semiconductor structure also includes a first III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial layer and a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure. The semiconductor structure further includes a second III-nitride epitaxial layer coupled to the first III-nitride epitaxial structure. The second III-nitride epitaxial layer is of a second conductivity type and is not electrically connected to the second III-nitride epitaxial structure.
申请公布号 US2014145201(A1) 申请公布日期 2014.05.29
申请号 US201213689574 申请日期 2012.11.29
申请人 AVOGY, INC. 发明人 NIE HUI;EDWARDS ANDREW P.;BOUR DAVID P.;KIZILYALLI ISIK C.;BROWN RICHARD J.;PRUNTY THOMAS R.
分类号 H01L29/78;H01L21/36;H01L29/20 主分类号 H01L29/78
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