发明名称 |
Defective memory cell address storage circuit and redundancy control circuit including the same |
摘要 |
A fail address storage circuit includes a fail address storage unit configured to store a fail address and a discrimination information storage unit configured to store information indicating whether a value stored in the fail address storage unit is a row address or column address. |
申请公布号 |
US8654597(B2) |
申请公布日期 |
2014.02.18 |
申请号 |
US201113191935 |
申请日期 |
2011.07.27 |
申请人 |
KONG YONG-HO;HYNIX SEMICONDUCTOR INC. |
发明人 |
KONG YONG-HO |
分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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