发明名称 Techniques Providing High-K Dielectric Metal Gate CMOS
摘要 A method for manufacturing a semiconductor device includes forming a first dummy gate on a substrate, performing a doping process to the substrate, thereby forming a source and a drain at sides of the first dummy gate, performing a first high temperature annealing to activate the source and drain, forming an inter-layer dielectric (ILD) material on the substrate, removing the first dummy gate to create an ILD trench, forming a first high-k dielectric layer within the ILD trench, forming a first dummy cap portion within the ILD trench over the first high-k dielectric layer, performing a second high-temperature annealing to reduce defects in the first high-k dielectric layer, and thereafter, replacing the first dummy cap portion with a first metal gate electrode.
申请公布号 US2014027843(A1) 申请公布日期 2014.01.30
申请号 US201314049829 申请日期 2013.10.09
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LU WEI-YUAN;CHEN KUAN--CHUNG;CHENG CHUN-FAI
分类号 H01L27/11;H01L29/78 主分类号 H01L27/11
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