发明名称 |
METHODS AND APPARATUS FOR CACHE LINE SHARING AMONG CACHE CONTROLLERS |
摘要 |
Methods and apparatus are provided for cache line sharing among cache controllers. A cache comprises a plurality of cache lines; and a cache controller for sharing at least one of the cache lines with one or more additional caches, wherein a given cache line shared by a plurality of caches corresponds to a given set of physical addresses in a main memory. The cache controller optionally maintains an ownership control signal indicating which portions of the at least one cache line are controlled by the cache and a validity control signal indicating whether each portion of the at least one cache line is valid. Each cache line can be in one of a plurality of cache coherence states, including a modified partial state and a shared partial state. |
申请公布号 |
US2014032858(A1) |
申请公布日期 |
2014.01.30 |
申请号 |
US201213557967 |
申请日期 |
2012.07.25 |
申请人 |
RAJAGOPALAN VIDYALAKSHMI;RAI ARCHNA;SONI ANUJ;KASHYAP SHARATH |
发明人 |
RAJAGOPALAN VIDYALAKSHMI;RAI ARCHNA;SONI ANUJ;KASHYAP SHARATH |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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地址 |
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