Low voltage differential signaling (LVDS) circuitry and method for dynamically controlling common mode voltage at input

摘要

Low voltage differential signaling (LVDS) circuitry and method for dynamically controlling the common mode voltage at the input of an LVDS receiver. The common mode voltage of the incoming LVDS signal is monitored. The common mode voltage at the input of the LVDS receiver is clamped at a clamp voltage when the common mode voltage of the incoming LVDS signal is less than a predetermined voltage, and allowed to track it otherwise.