发明名称 INTEGRATED CIRCUIT CHIP AND MEMORY DEVICE
摘要 An integrated circuit chip includes: a test activation pad which receives a test activation signal; a plurality of test input pads which includes reset pads; a signal combining unit which generates a plurality of test output signals by combining signals inputted to the test input pads when the test activation signal is activated; and a reset control unit which generates a system reset signal using a signal inputted to the reset pad in the deactivation state of the test activation signal and generates the system reset signal using the test activation signal in the activation state of the test activation signal. [Reference numerals] (220) Receiving circuit; (230) Signal combining unit; (241) Output unit; (260) Reset control unit; (270) Internal circuits
申请公布号 KR20140002926(A) 申请公布日期 2014.01.09
申请号 KR20120069889 申请日期 2012.06.28
申请人 SK HYNIX INC. 发明人 KU, KIE BONG
分类号 G11C29/10;G11C29/18 主分类号 G11C29/10
代理机构 代理人
主权项
地址