发明名称 |
Systems, circuits, and methods for a digital frequency synthesizer |
摘要 |
Systems, methods, and circuits provide a digital frequency synthesizer where the output of the frequency synthesizer is a fractional factor of an input signal frequency. The digital frequency synthesizer may comprise a time to digital converter. A ramp offset signal may be added to the output of the time to digital converter. The ramp offset signal may be added to the output of a TDC until a reference dock signal reaches a value of pi. At such a point, the reference clock signal may be switched and the ramp offset signal may be restarted. As such, a frequency offset may be introduced at the input of the time to digital converter where the frequency offset may be modified by changing the slope of the ramp offset signal. |
申请公布号 |
US8552767(B1) |
申请公布日期 |
2013.10.08 |
申请号 |
US201213435461 |
申请日期 |
2012.03.30 |
申请人 |
NIKAEEN PARASTOO;SIDIROPOULOS STEFANOS;LOINAZ MARC JOSEPH;BROADCOM CORPORATION |
发明人 |
NIKAEEN PARASTOO;SIDIROPOULOS STEFANOS;LOINAZ MARC JOSEPH |
分类号 |
H03B21/00 |
主分类号 |
H03B21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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