发明名称 |
SIGNAL GENERATION CIRCUIT AND METHOD THEREOF |
摘要 |
<p>PURPOSE: A signal generating circuit and an operating method thereof are provided to reduce current accumulation phenomena by increasing the cycle of a clock signal generated during initial operation. CONSTITUTION: A clock signal generator (112-3) changes a frequency according to a selected signal. The clock signal generator generates a clock signal having the changed frequency. A transmission control circuit controls the transmission of the clock signal. A counter (112-1) performs one of count operation and stop operation based on an output signal. The counter outputs the selected signal according to a result of the performance.</p> |
申请公布号 |
KR20130102710(A) |
申请公布日期 |
2013.09.23 |
申请号 |
KR20120023750 |
申请日期 |
2012.03.08 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
YOON, GIL WON;KO, YU S |
分类号 |
H03K5/135;H03K7/08 |
主分类号 |
H03K5/135 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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