发明名称 |
STRESS ENHANCED MOS TRANSISTOR AND METHODS FOR FABRICATION |
摘要 |
A stress enhanced MOS transistor and methods for its fabrication are provided. In one embodiment the transistor includes a channel region at a surface of a semiconductor substrate. The method includes etching first recesses into the semiconductor substrate adjacent the channel region to define adjacent regions in the semiconductor substrate between the first recesses and the channel region. A first layer of SiGe is epitaxially grown in the first recesses. The method includes etching second recesses through the first layer of SiGe and into the adjacent regions of the semiconductor substrate. Further, a second layer of SiGe is epitaxially grown in the second recesses.
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申请公布号 |
US2013175640(A1) |
申请公布日期 |
2013.07.11 |
申请号 |
US201213345432 |
申请日期 |
2012.01.06 |
申请人 |
ILLGEN RALF;FLACHOWSKY STEFAN;GLOBALFOUNDRIES INC. |
发明人 |
ILLGEN RALF;FLACHOWSKY STEFAN |
分类号 |
H01L21/336;H01L29/78 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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