发明名称 |
VLIW processor with execution units executing instructions from instruction queues and accessing data queues to read and write operands |
摘要 |
A processor may include a plurality of processing units for processing instructions, where each processing unit is associated with a discrete instruction queue. Data is read from a data queue selected by each instruction, and a sequencer manages distribution of instructions to the plurality of discrete instruction queues.
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申请公布号 |
US8458443(B2) |
申请公布日期 |
2013.06.04 |
申请号 |
US20090555146 |
申请日期 |
2009.09.08 |
申请人 |
TRAMM MATTHIAS;STADLER MANFRED;HITZ CHRISTIAN;SMSC HOLDINGS S.A.R.L. |
发明人 |
TRAMM MATTHIAS;STADLER MANFRED;HITZ CHRISTIAN |
分类号 |
G06F9/34 |
主分类号 |
G06F9/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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