发明名称 METHOD AND SYSTEM FOR HIGH GAIN AUTO-ZEROING ARRANGEMENT FOR ELECTRONIC CIRCUITS
摘要 A method and system for high gain auto-zeroing arrangement for electronic circuits. An auto-zero electronic circuit eliminates an offset associated with a test electronic circuit. The test electronic circuit includes a pair of input terminals configured to receive an input voltage signal and a pair of output terminals. The auto-zero electronic circuit includes a pair of source followers, and a pair of capacitors coupled to the output terminals of the test electronic circuit for sampling the offset associated with the test electronic circuit. The auto-zero electronic circuit also includes a differential pair coupled to the pair of source followers. A pair of diode-connected transistors, coupled to the differential pair, is configured to generate biasing voltage signals. The biasing voltage signals modulate the control terminals of a pair of input source followers of the test electronic circuit and eliminate the offset associated with the test electronic circuit.
申请公布号 US2013134988(A1) 申请公布日期 2013.05.30
申请号 US201113307018 申请日期 2011.11.30
申请人 PULIJALA SRINIVAS K.;STANDARD MICROSYSTEMS CORPORATION 发明人 PULIJALA SRINIVAS K.
分类号 G01R35/00 主分类号 G01R35/00
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