发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT HAVING AN ON-CHIP PLL AND OPERATING METHOD THEREOF
摘要 An on-chip phase-locked loop circuit has reduced power consumption in a semiconductor integrated circuit. The phase locked loop circuit is equipped with a phase frequency comparator, a loop attenuator, a charge pump, a loop filter, a voltage controlled oscillator and a divider. The attenuator includes a sampling circuit and a counter. A sampling pulse and first and second output signals both outputted from the phase frequency comparator are supplied to the sampling circuit. The sampling circuit outputs a sampling output signal. When the counter completes a countup of a predetermined number of sampling pulses outputted from the sampling circuit, the counter outputs a countup completion output signal. The charge pump outputs a charging current or a discharging current to the loop filter in response to the countup completion output signal.
申请公布号 US2013076414(A1) 申请公布日期 2013.03.28
申请号 US201213652809 申请日期 2012.10.16
申请人 RENESAS ELECTRONICS CORPORATION;RENESAS ELECTRONICS CORPORATION 发明人 KATO TAKAHIRO
分类号 H03L7/097 主分类号 H03L7/097
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