发明名称 |
INSTRUCTION PACKET INCLUDING MULTIPLE INSTRUCTIONS HAVING A COMMON DESTINATION |
摘要 |
An apparatus includes a processor and a memory coupled to the processor. The memory stores an instruction packet (e.g., a VLIW instruction packet) including a first predicate independent instruction and a second predicate independent instruction. Each of the predicate independent instructions has the same destination. |
申请公布号 |
US2013067205(A1) |
申请公布日期 |
2013.03.14 |
申请号 |
US201113228601 |
申请日期 |
2011.09.09 |
申请人 |
PLONDKE ERICH J.;CODRESCU LUCIAN;ZENG MAO;TABONY CHARLES J.;VENKUMAHANTI SURESH K.;QUALCOMM INCORPORATED |
发明人 |
PLONDKE ERICH J.;CODRESCU LUCIAN;ZENG MAO;TABONY CHARLES J.;VENKUMAHANTI SURESH K. |
分类号 |
G06F9/30;G06F9/305 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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