发明名称 Semiconductor device having calibration circuit for adjusting output impedance of output buffer circuit
摘要 Disclosed herein is a device that includes a replica buffer circuit that drives a calibration terminal, a reference-potential generating circuit that generates a reference potential, a comparison circuit that compares a potential appearing at the calibration terminal with the reference potential, and a control circuit that changes an output impedance of the replica buffer circuit based on a result of a comparison by the comparison circuit. The reference-potential generating circuit includes a first potential generating unit activated in response to an enable signal and a second potential generating unit activated regardless of the enable signal, and an output node of the first potential generating unit and an output node of the second potential generating unit are commonly connected to the comparison circuit.
申请公布号 US8390318(B2) 申请公布日期 2013.03.05
申请号 US201213401052 申请日期 2012.02.21
申请人 YOKOU HIDEYUKI;EGUCHI TAKANORI;ISHIMATSU MANABU;ELPIDA MEMORY, INC. 发明人 YOKOU HIDEYUKI;EGUCHI TAKANORI;ISHIMATSU MANABU
分类号 H03K17/16 主分类号 H03K17/16
代理机构 代理人
主权项
地址