发明名称 ROUTER AND MANY-CORE SYSTEM
摘要 According to one embodiment, a router manages routing of a packet transferred between a plurality of cores and at least one of cache memories to which the cores can access. The router includes an analyzer, a packet memory and a controller. The analyzer determines whether the packet is a read-packet or a write-packet. The packet memory stores at least part of the write-packet issued by one of the cores. The controller stores cache data of the write-packet and a cache address in the packet memory when the analyzer determines that the packet is the write-packet. The cache address indicates an address in which the cache data is stored. The controller outputs the cache data stored in the packet memory to the core issuing a read-request as a response data corresponding to the read packet when the analyzer determines that the packet is the read-packet and the cache address corresponding to the read-request is stored in the packet memory.
申请公布号 US2012198173(A1) 申请公布日期 2012.08.02
申请号 US201113053115 申请日期 2011.03.21
申请人 XU HUI;KABUSHIKI KAISHA TOSHIBA 发明人 XU HUI
分类号 G06F12/08 主分类号 G06F12/08
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