OPERATION OF FIELD-EFFECT TRANSISTOR CIRCUITS HAVING SUBSTANTIAL DISTRIBUTED CAPACITANCE

摘要

The distributed capacitance at circuit nodes between conduction paths of interconnected field-effect transistors of a memory decoder is maintained charged to a fixed value during the major portion of the memory operating time. As one example, the distributed capacitance at a column of the memory may be connected to the charging source except for the brief intervals during which a location in that column is being accessed. Operation in this way improves both the speed and reliability of the decoder circuit.