发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device which can arrange desired wiring without causing increase of a chip area even when being microfabricated finely. <P>SOLUTION: The semiconductor memory device includes an active area 12 and a plurality of first bit lines SABL formed in a semiconductor substrate. A first wiring BLCRL is extended along a direction which intersects the plurality of the first bit lines SABL to transmit a control potential applied to a second bit line(s) not selected among a plurality of the second bit lines BL connected to a plurality of memory cells formed on the semiconductor substrate. A second wiring 21 is electrically connected to the first wiring BLCRL and extended along the first bit lines SABL. A third wiring 23 is electrically connected to the second wiring 21 and extended in a direction which intersects the first bit lines SABL. The fourth wiring 34 electrically connects between the third wiring 23 and an impurity diffused layer in a portion equivalent to a node of the active area to which the control potential are applied. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2011222775(A) |
申请公布日期 |
2011.11.04 |
申请号 |
JP20100090882 |
申请日期 |
2010.04.09 |
申请人 |
TOSHIBA CORP;TOSHIBA INFORMATION SYSTEMS (JAPAN) CORP;TOSHIBA INFORMATION SYSTEMS TECHNOLOGY INC |
发明人 |
FUNAYAMA AKINOBU;SUDO AKIRA |
分类号 |
H01L21/8247;G11C16/04;H01L27/10;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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