发明名称 |
Method of forming stress relief layer between die and interconnect structure |
摘要 |
A semiconductor device is made by forming a first conductive layer over a sacrificial carrier. A conductive pillar is formed over the first conductive layer. An active surface of a semiconductor die is mounted to the carrier. An encapsulant is deposited over the semiconductor die and around the conductive pillar. The carrier and adhesive layer are removed. A stress relief insulating layer is formed over the active surface of the semiconductor die and a first surface of the encapsulant. The stress relief insulating layer has a first thickness over the semiconductor die and a second thickness less than the first thickness over the encapsulant. A first interconnect structure is formed over the stress relief insulating layer. A second interconnect structure is formed over a second surface of encapsulant opposite the first interconnect structure. The first and second interconnect structures are electrically connected through the conductive pillar.
|
申请公布号 |
US8039303(B2) |
申请公布日期 |
2011.10.18 |
申请号 |
US20090481404 |
申请日期 |
2009.06.09 |
申请人 |
STATS CHIPPAC, LTD. |
发明人 |
SHIM IL KWON;CHOW SENG GUAN;LIN YAOJIAN |
分类号 |
H01L23/482;H01L21/50 |
主分类号 |
H01L23/482 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|