| 摘要 |
A pulse sequence shaper with adjustable length, a period and fixed pause equal to three cycles comprises reversible counterdown binary counter having a clock input, integration/counterdown input, synchronous parallel load enable input, loading data inputs, counting mode enable input, asynchronous reset input, overflow output, a circuit comprising in series connected resistor and capacitor, a start-stop device comprising a synchronous D flip-flop with asynchronous reset input, first and second two-input AND elements, first and second OR elements. Two JK-triggers with asynchronous reset are incorporated, each of which has by two inputs J and K, AND inputs are united. |
