| 摘要 |
A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference is operated such that one or more reference capacitors remain coupled to an input summing node of the ADC input integrator when an input value to a feedback digital-to-analog converter (DAC) indicates that their contribution is not required to apply a reference in the next quantization period. The reference switching network can select from two or more of the following reference options: 1) switch the reference capacitor to apply a charge quanta as per an ordinary switched-capacitor cycle, 2) switch the reference voltage on a second terminal of the reference capacitor to apply an opposite polarity charge quanta, or 3) leave the first terminal of the reference capacitor coupled to the integrator without changing the voltage at the second terminal of the reference capacitor.
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