| 摘要 |
A multi-port memory, comprising: m (m≧2) input/output ports independent of one another; n (n≧2) memory banks independent of one another; and a route switching circuit capable of optionally setting signal routes of a command, an address, and input/output data between the m input/output ports and the n memory banks, wherein the route switching circuit allocates p (1≦̸p≦̸m) input/output ports optionally selected from the m input/output ports to a memory bank optionally selected from the n memory banks.
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