发明名称 Semiconductor device and manufacturing method thereof
摘要 Provided is a technology, in a semiconductor device having a power MISFET and a Schottky barrier diode on one semiconductor substrate, capable of suppressing a drastic increase in the on-resistance of the power MISFET while making the avalanche breakdown voltage of the Schottky barrier diode greater than that of the power MISFET. In the present invention, two epitaxial layers, one having a high doping concentration and the other having a low doping concentration, are formed over a semiconductor substrate and the boundary between these two epitaxial layers is located in a region equal in depth to or shallower than the bottom portion of a trench.
申请公布号 US7999345(B2) 申请公布日期 2011.08.16
申请号 US20090400436 申请日期 2009.03.09
申请人 RENESAS ELECTRONICS CORPORATION 发明人 NAKAZAWA YOSHITO;MATSUURA HITOSHI
分类号 H01L29/47 主分类号 H01L29/47
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