发明名称 STACKED SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
摘要 PURPOSE: A stacked semiconductor package and method of manufacturing the same are provided to prevent a void from being formed on a common penetration electrode by forming a penetration electrode from a second penetration hole to a first penetration hole. CONSTITUTION: In a stacked semiconductor package and method of manufacturing the same, a first semiconductor chip(100) comprises a first bonding pad(110), a first penetration hole(120), and a first insulating layer(130). The first semiconductor chip comprises a first side(101) and a second side(102) which are opposite to each other. The second semiconductor chip(200) is arranged in the lower part of the first semiconductor chip. The second semiconductor chip comprises a second bonding pad(210), a second penetration hole(220), and a second insulating layer(230). The common penetration electrode(300) is formed within the first penetration hole and the second penetration hole.
申请公布号 KR20110078401(A) 申请公布日期 2011.07.07
申请号 KR20090135204 申请日期 2009.12.31
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YANG, SEUNG TAEK
分类号 H01L23/12;H01L23/48 主分类号 H01L23/12
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