发明名称 SHARING PHYSICAL MEMORY LOCATIONS IN MEMORY DEVICES
摘要 A memory structure includes a plurality of address banks where each address bank is operative to store a memory address. In certain embodiments, at least two of the address banks share physical memory locations for at least one redundant most significant bit. Additionally, at least two of the address banks in certain embodiments share physical memory locations for at least one redundant most significant bit and at least one redundant least significant bit. At least two of the address banks in certain embodiments also share physical memory locations for at least one redundant interior bit.
申请公布号 US2011167193(A1) 申请公布日期 2011.07.07
申请号 US20100982111 申请日期 2010.12.30
申请人 MICRON TECHNOLOGY, INC. 发明人 AYYAPUREDDI SUJEET
分类号 G06F12/06 主分类号 G06F12/06
代理机构 代理人
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