发明名称 Charge pump circuit and a novel capacitor for a memory integrated circuit
摘要 A novel capacitor for use in a charge pump circuit has a substrate with a planar surface. A first electrode is in a first plane spaced apart from the planar surface. A second electrode is adjacent to and is spaced apart from the first electrode in the first plane and is capacitively coupled thereto. A third electrode is in a second plane, spaced apart from the first plane and is capacitively coupled to the first electrode. A fourth electrode is adjacent to and spaced apart from the third electrode in the second plane and is capacitively coupled to the third electrode and capacitively coupled to the second electrode. The first and fourth electrodes are electrically connected together and the second and third electrodes are electrically connected together. In addition, a cylindrical shape electrode, and a great wall electrode, and charge pump capacitor-by-pattern-filling is disclosed. A charge pump circuit using the foregoing described capacitor has a plurality of transistors for charging the capacitor and discharging the capacitor thereby increasing the voltage of the charge pump circuit.
申请公布号 US7969239(B2) 申请公布日期 2011.06.28
申请号 US20090569832 申请日期 2009.09.29
申请人 SILICON STORAGE TECHNOLOGY, INC. 发明人 VAN TRAN HIEU;NGUYEN HUNG Q.;VU THUAN T.;LY ANH
分类号 H01L25/00 主分类号 H01L25/00
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