发明名称 METHOD FOR THE PLANARIZATION OF A SEMICONDUCTOR CHIP BY MEANS OF A SOLDER CONNECTION AND A SEMICONDUCTOR CHIP
摘要 The invention relates to the use of a solder connection as a planarization plane in a semiconductor chip. The invention describes a semiconductor chip and a method for producing a semiconductor chip, wherein a metallic planarization plane has a planarization material (200) having a melting point below 600°C.
申请公布号 WO2011072976(A1) 申请公布日期 2011.06.23
申请号 WO2010EP67728 申请日期 2010.11.18
申请人 OSRAM OPTO SEMICONDUCTORS GMBH;EISSLER, DIETER;PLOESL, ANDREAS 发明人 EISSLER, DIETER;PLOESL, ANDREAS
分类号 H01L33/00;B23K1/00;H01L21/60;H01L33/40;H01L33/62;H01L33/64 主分类号 H01L33/00
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