发明名称 Muting circuit and semiconductor integrated circuit
摘要 A muting circuit of the present invention includes: an input terminal that receives a control signal for allowing switching between ON and OFF of a mute operation; and a muting transistor connected to the input terminal and an output terminal of the amplifier. The muting transistor is a MOS transistor, and a gate is connected to the input terminal, a drain is connected to the output terminal of the amplifier, and a source is grounded. Consequently, a shot noise due to a DC difference caused when a mute state is switched between ON and OFF can be suppressed.
申请公布号 US7940940(B2) 申请公布日期 2011.05.10
申请号 US20060481158 申请日期 2006.07.05
申请人 PANASONIC CORPORATION 发明人 KAKUMOTO YASUNOBU;FUJII KEIICHI
分类号 H04B15/00;H03F1/14 主分类号 H04B15/00
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