发明名称 Circuit architecture for effective compensating the time skew of circuit
摘要 A circuit architecture for effective compensating the time skew of circuit is disclosed. The circuit architecture comprises a required compensation circuit, two duplicated circuits, and a time skew detection and compensation circuit, wherein these duplicated circuits are the duplicates of the required compensation circuit. A differential of logic 0 and logic 1 signals are simultaneously inputted into two duplicated circuits to output a first detection signal and a second detection signal, then the time skew detection and compensation circuit detects the time skew between a first detection signal and a second detection signal so as to generate a compensation signal to the required compensation circuit. Accordingly, the time skew existed in the required compensation circuit can be reduced or eliminated.
申请公布号 US7919989(B2) 申请公布日期 2011.04.05
申请号 US20100757505 申请日期 2010.04.09
申请人 ETRON TECHNOLOGY INC. 发明人 SHIH JENG-TZONG
分类号 H03K19/00 主分类号 H03K19/00
代理机构 代理人
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