发明名称 Using Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models for metal-gate structures
摘要 The invention provides a method of processing a wafer using multilayer processing sequences and Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models and libraries that can include one or more measurement procedures, one or more Poly-Etch (P-E) sequences, and one or more metal-gate etch sequences. The MLMIMO process control uses dynamically interacting behavioral modeling between multiple layers and/or multiple process steps. The multiple layers and/or the multiple process steps can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created using isotropic and/or anisotropic etch processes.
申请公布号 US7894927(B2) 申请公布日期 2011.02.22
申请号 US20080186619 申请日期 2008.08.06
申请人 TOKYO ELECTRON LIMITED 发明人 FUNK MERRITT;SUNDARARAJAN RADHA;YAMASHITA ASAO;PRAGER DANIEL;LEE HYUNG JOO
分类号 G06F19/00;G06F1/00;G06F7/60;G06F17/50 主分类号 G06F19/00
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