发明名称 COMPARATOR CIRCUIT, COMPARISON OUTPUT METHOD, A/D CONVERSION CIRCUIT, AND A/D CONVERSION METHOD
摘要 PROBLEM TO BE SOLVED: To provide a comparator circuit capable of dramatically improving determination time of a comparison result based on a meta-stable state in the comparator circuit. SOLUTION: The comparator circuit is configured of two-stage of a first stage comparator circuit section and a second stage comparator circuit section. The first stage comparator circuit section operates in first clock timing, outputs output voltage at a high level or a low level as comparison output according to a comparison determination result between a level of an input signal and a reference level, and outputs output voltage of an intermediate value of the output voltages at the high level and the low level as the comparison output while comparison determination can not be performed. The second stage comparison circuit section operates in second clock timing delayed from the first clock timing, compares the comparison output of the first stage comparison output section with voltage for comparison with a value different from the output voltage of the intermediate value, outputs the comparison output according to its comparison determination result, and performs self-holding of the comparison output of the determination result. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010288111(A) 申请公布日期 2010.12.24
申请号 JP20090140814 申请日期 2009.06.12
申请人 SONY CORP 发明人 TAYU KENICHI
分类号 H03K5/08;G01R19/165;H03M1/14;H03M1/36 主分类号 H03K5/08
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