发明名称 COMPENSATION METHOD AND CIRCUIT
摘要 A circuit and method for compensating for parasitic elements of a transistor. A transistor, a controller, and a compensation element are mounted to a printed circuit board. The transistor includes parasitic drain and source inductors. The compensation element may be a discrete inductor that has an inductance value equal to about the sum of the inductance values of the parasitic drain and source inductors. The magnitudes of the compensation voltage and the sum of the voltages across the parasitic drain and source inductances are substantially equal. Thus, the compensation voltage developed across the compensation inductor is used to adjust a reference voltage within the controller. A drain-to-source voltage is applied to one input of a comparator within the controller and the adjusted reference voltage is applied to another input of the comparator. An output signal of the comparator is input to drive circuitry that drives a gate of the transistor.
申请公布号 US2010244941(A1) 申请公布日期 2010.09.30
申请号 US20090414862 申请日期 2009.03.31
申请人 发明人 STULER ROMAN;PTACEK KAREL
分类号 G05F1/10;H03H11/24 主分类号 G05F1/10
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