发明名称 DATA PROCESSOR
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a data processor capable of starting a system at high speed. <P>SOLUTION: An SRAM 30 has a preset area 34 sharing an address space with a ROM 13. A flag register 32 is provided corresponding to the prescribed word of the preset area 34, and stores information indicating whether or not the writing of data is performed in the area of the prescribed word. Then, a selector 33 selectively outputs, to a CPU, either the output of the ROM 13 or the output of the SRAM 30 corresponding to the contents of the flag register 32 when the CPU accesses the preset area 34. Thus, since data transfer is performed to the SRAM 30 only for the part of the bug measure and code change of a program, a data amount to be transferred from an external storage device to the SRAM 30 can be reduced and the system can be started at high speed. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010211595(A) 申请公布日期 2010.09.24
申请号 JP20090057960 申请日期 2009.03.11
申请人 RENESAS ELECTRONICS CORP 发明人 HASHIZUME TAKESHI
分类号 G06F11/00;G06F12/06 主分类号 G06F11/00
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