发明名称 SRAM cache and flash micro-controller with differential packet interface
摘要 A flash microcontroller has a Static Random-Access-Memory (SRAM) buffer that stores several blocks of boot code read from a flash memory. The SRAM buffer also operates as a cache of flash data after booting is complete. Cache read and write hits use the SRAM cache rather than flash memory, while old cache lines and read misses access the flash memory. Both the external host and the microcontroller are booted from boot code buffered in the SRAM buffer. A boot-loader state machine reads the flash ID and programs flash parameter registers with timing parameters for the flash memory. The flash microcontroller uses a differential interface to the external host, with a differential transceiver and a differential serial interface. Frame, packet, and encoded clock processing is also performed by the serial interface.
申请公布号 US7707354(B2) 申请公布日期 2010.04.27
申请号 US20070876251 申请日期 2007.10.22
申请人 发明人 LEE CHARLES C.;CHOW DAVID Q.;MA ABRAHAM C.;YU FRANK;SHEN MING-SHIANG
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
主权项
地址