| 摘要 |
<P>PROBLEM TO BE SOLVED: To efficiently perform logic verification of a cache memory. <P>SOLUTION: A cache logic verification apparatus includes: a cache memory 200 for storing copies of partial contents of the memory; a cache state acquisition part 400 for acquiring progress in each stage of stepwise processing for determining whether data to be read is stored or not; and a verification part 500 for comparing the progress in each stage which is acquired by the cache state acquisition part 400 with a scheduled progress predetermined in each stage of the stepwise processing. <P>COPYRIGHT: (C)2010,JPO&INPIT |
