| 摘要 |
A memory controller circuit configured to control an SDRAM is provided. The memory controller circuit includes a first unit configured to accept an access request provided by one of a plurality of masters for access to a page included in the SDRAM. The memory controller circuit includes a second unit configured to record an access request period of each of the masters. The memory controller circuit includes a third unit configured to set an open period of the page on the basis of the access request period recorded in the second unit in accordance with the master having provided the access request. The third unit is configured to open the page requested to be accessed for the open period having been set.
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