发明名称 |
METHOD OF AUTOMATICALLY FORMING INTEGRATED CIRCUIT LAYOUT |
摘要 |
PROBLEM TO BE SOLVED: To provide a method of automatically forming an integrated circuit layout optimizing the arrangement of the layout by forming the integrated circuit layout by a plurality of standard cells having the same cell height. SOLUTION: The method of automatically forming the integrated circuit layout includes: a process 510 of determining a first cell height; a process 520 of manufacturing a plurality of standard cells each having the first cell height; and a process 530 of forming the integrated circuit layout from the plurality of standard cells by arranging and wiring the plurality of standard cells. COPYRIGHT: (C)2010,JPO&INPIT
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申请公布号 |
JP2010056548(A) |
申请公布日期 |
2010.03.11 |
申请号 |
JP20090180275 |
申请日期 |
2009.08.03 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD |
发明人 |
LU LEE-CHUNG;WANG CHUNG-HSING;LI PING CHUNG;TAI CHUN-HUI;TIEN LI-CHUN;CHANG GWAN SIN |
分类号 |
H01L21/82;G06F17/50 |
主分类号 |
H01L21/82 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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