发明名称 DELAY VARIATION ANALYSIS UNIT, AND DELAY VARIATION CALCULATION METHOD
摘要 PROBLEM TO BE SOLVED: To simply analyze circuit delay variation distribution. SOLUTION: A method for analyzing delay time variation of a circuit including N-stage elements is provided. The method includes a delay time calculation step for calculating a maximum deviation delay time of a signal that propagates the circuit and a basic delay time of the circuit, a delay variation calculation step for calculating a delay variation value of the N-stage circuit, using N-stage mean squares of differences between the maximum deviation delay time of the circuit and the basic delay time of the circuit, and a step for generating the delay time distribution of the N-stage circuit as normal distribution, using the calculated delay variation value. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010039575(A) 申请公布日期 2010.02.18
申请号 JP20080198869 申请日期 2008.07.31
申请人 FUJITSU LTD 发明人 KANBARA FUMI;YOSHIDA YUJI;SATO SUGIO
分类号 G06F17/50 主分类号 G06F17/50
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