发明名称 Processing in pipelined computing units with data line and circuit configuration rule signal line
摘要 A semiconductor device for performing data processing by performing a plurality of computations in cycles includes a pipeline formed by connecting a plurality of computing units in series, each of the computing units including: a data line for receiving data; a control line for receiving a rule signal; a circuit information control unit configured to store, before data processing, several circuit information items, and to output a first one of the several circuit information items according to the rule signal received via the control line in a first cycle of the data processing; a processing element configured to construct an execution circuit according to the first circuit information item, to perform a computation using data from the data line, and to output a computation result; a data register for storing the computation result, and for outputting the computation result in a second cycle; and a control register for storing the rule signal and for outputting the rule signal in the second cycle. The semiconductor further includes a controller configured to control output timing of the rule signal to the control line of a first-stage one of the computing units in the pipeline and to control output timing of the data to the data line of the first-stage computing unit in the first cycle, so that the plurality of computing units are operated as a pipeline.
申请公布号 US7653805(B2) 申请公布日期 2010.01.26
申请号 US20070727134 申请日期 2007.03.23
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 YOSHIKAWA TAKASHI;ASANO SHIGEHIRO;YAMADA YUTAKA
分类号 G06F15/76 主分类号 G06F15/76
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