| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a technique for suppressing occurrence of soft errors of a semiconductor integrated circuit. Ž<P>SOLUTION: A MISFET (2) constituting a semiconductor integrated circuit device includes a drain diffusion layer (4) of a first conductivity type, a source diffusion layer (3) of the first conductivity type, a gate electrode (5), and a substrate (8)/well (9) of a second conductivity type as the opposite conductivity type to the first conductivity type. In the MISFET (2) at a position opposed to a surface of element separation of at least two sides of a circumference of the drain difference layer (4), first diffusion layers (11) and (12) of the same conductivity type as the first conductivity type are provided at two or more positions at prescribed intervals with an isolation insulating film (6) therebetween respectively. The two or more positions are facing at least two sides of the element isolation plane around the drain diffusion layer (4). A second diffusion layer (16) of the second conductivity type is provided so as to be close to or to come in contact with the source diffusion layer. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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